1. Field of the Invention
The present invention relates to a correcting method of exposure pattern, an exposure method, an exposure system, a photomask and a semiconductor device.
2. Description of the Related Art
In the case of preparing a photomask having a light shielding film pattern, prior to a manufacturing process of a semiconductor device, computer-aided design (CAD) data relative to an exposure pattern having a previously designed light shielding film pattern is converted into data for lithography system. Subsequently, patterning is faithfully carried out by the lithography system on the basis of the above data for lithography system so as to generate an exposure pattern having the light shielding film pattern thus prepared. Then, the exposure pattern is transferred onto a glass substrate using a photographic technology so as to generate a photomask having the exposure pattern.
In the manufacturing process of a semiconductor device, the exposure pattern on the photomask is projected on a semiconductor wafer, on which a photosensitive thin film is previously formed, by using a pattern transfer technology such as a so-called photolithography. Then, the photosensitive thin film is exposed by light and is then developed. Thus, a resist pattern faithfully following a shape of the light shielding film is generated on the semiconductor wafer.
Reference document:
xe2x80x9cIllustrated Ultra-LSI Optics (Zukai Cho-LSI Kogaku)xe2x80x9d published by Tetsugaku Shuppan (K.K.)
In this photolithography process in the manufacturing process of a semiconductor device, a resist pattern having a pattern width near a wavelength of light used for exposure is formed on a semiconductor wafer, and an interference effect of light remarkably appears in the exposure. As a result, a defect by optical proximity effect becomes a problem. Specifically, the optical proximity effect is a factor in causing a dimensional error between a pattern prepared in making a design and the resist pattern that uses the prepared pattern and is generated on the semiconductor wafer in the aforesaid manner using the pattern.
The defect by optical proximity effect appears as an enlargement phenomenon of a width of resist pattern occurring between a plurality of resist line patterns which are formed by being repeatedly arranged, and as a line shrinkage phenomenon occurring in an end portion of an isolated resist pattern. For this reason, in a manufacturing process of the semiconductor device, there is the possibility of causing problems such as a deterioration of gate line width control and a reduction of margin in alignment.
In a semiconductor device manufactured by the manufacturing process having the problem as described above, a dispersion increases in a transistor characteristic, and finally, the yield is reduced. As a result, there is the possibility of remarkably giving an influence to a productivity of a semiconductor chip.
The aforesaid problem is a fatal factor in a manufacturing process of a repeated memory cell requiring a high integration. In order to solve the above problem, after generation of device manufactured by a manufacturing process based on a design by 0.35 xcexcm rule, there is a need for exposing a pattern width in the vicinity of exposure wavelength of a light used in exposing on a semiconductor wafer. For this reason, a high, accurate optical proximity effect automatic correction (hereinafter, referred simply to as OPC) system based on a light intensity simulation has been developed.
After generation of manufacturing a semiconductor device on the basis of a design by 0.35 xcexcm rule, the defect resulting from the optical proximity effect appears as the following phenomena. The phenomena includes a dispersion of a line width of a line pattern arranged and formed in not only repeated memory cell area but also one chip random circuit IC area generated by an ASIC (application specific IC) type semiconductor device such as gate array or the like, and a line shrinkage occurring in an end portion of an isolated resist pattern. Finally, the yield is reduced. As a result, there is a problem of remarkably giving an influence to a productivity of a semiconductor IC chip.
In the aforesaid random circuit IC, in order to correct the optical proximity effect in a random pattern formed into a one-chip scale, the OPC system based on light intensity simulation is applied. However, in this case, the following problems arise. Specifically, a huge calculating time for calculating the correction data is required, and there is an influence of increasing of the number of days required for TAT (turn-around time) from design to manufacturing processes of a semiconductor chip.
For example, a required time for making a correction for each cell unit of about several pm angle is about 10 seconds. However, about several hundreds of days are required in the case of correcting all of defects resulting from the optical proximity effect for each cell unit of the entire semiconductor chip.
In order to solve the problem of requiring a huge required time, the following method has been known as a proper method. Specifically, there is a rule base method of correcting the defect of only limited pattern of the entire IC chip on the basis of a previously set rule. However, at present, this method has no level of making a perfectly satisfied correction on defect.
Next, with reference to FIGS. 4A and B, FIGS. 5A and B and FIG. 8, the following examples will be described. More specifically, there are shown light intensity simulation results of an influence of an optical proximity effect resulting from a coarse and dense dependency of pattern array, and of correcting a pattern receiving the optical proximity effect by using a conventional method.
In FIG. 4A, a reference numeral 1 denotes an exposure pattern formed on a photomask, and the exposure pattern 1 is composed of an isolated light shielding film pattern portion 3, light shielding film pattern portions 5A, 5B and 5C which are densely arranged in parallel with each other.
FIG. 4B shows a resist pattern 7 that is formed on a surface of a semiconductor wafer by exposing the semiconductor wafer using a photomask including the pattern 1 described and shown in FIG. 4A. In the resist pattern 7, 3A is a resist pattern according to the light shielding film pattern portion 3, 7A is a resist pattern according to the light shielding film pattern portion 5A, 7B is a resist pattern according to the light shielding film pattern portion 5B, and 7C is a resist pattern according to the light shielding film pattern portion 5C.
As seen from the resist pattern portions 7A, 7B and 7C shown in FIG. 4B, individual pattern widths 10A, 10B and 10C of these resist pattern portions are formed narrower than individual widths 9A, 9B and 9C of the light shielding film patterns 5A, 5B and 5C. In other words, there is a problem that these pattern widths 10A, 10B and 10C are formed narrower than the pattern width of the resist pattern 3A resulting from an influence of the optical proximity effect.
Next, shrinkage of each pattern width shown in FIG. 4A and FIG. 4B resulting from the optical proximity effect is subjected to a light intensity simulation. Based on the simulation result, individual widths 9A, 9B and 9C of the light shielding film patterns 5A, 5B and 5C are corrected, and then, a semiconductor wafer is exposed using the corrected photomask so as to form a resist pattern. The light intensity simulation result of the resist pattern will be described below with reference to FIG. 5A and FIG. 5B.
In FIG. 5A, a reference numeral 11 denotes an exposure pattern of the corrected photomask, and the exposure pattern 11 is composed of an isolated light shielding film pattern portion 13, light shielding film pattern portions 15A, 15B and 15C which are densely arranged in parallel with each other.
In the exposure pattern 11 shown in FIG. 5A, based on the light intensity simulation result of the shrinkage resulting from the optical proximity effect of each pattern shown in FIG. 4A, a pattern width 13A of the isolated light shielding film pattern portion 13 is corrected, and then, the pattern width 13A of the isolated light shielding film pattern portion 13 is formed narrower than individual pattern widths 19A, 19B and 19C of the light shielding film pattern portions 15A, 15B and 15C.
FIG. 5B shows a resist pattern 17 that is formed on a surface of a semiconductor wafer by exposing the semiconductor wafer using a photomask including the pattern 11 described and shown in FIG. 5A. In the resist pattern 17, 16A is a resist pattern according to the light shielding film pattern portion 13, 17A is a resist pattern according to the light shielding film pattern portion 15A, 17B is a resist pattern according to the light shielding film pattern portion 15B, and 17C is a resist pattern according to the light shielding film pattern portion 15C.
As seen from the resist pattern portions 17A, 17B and 17C shown in FIG. 5B, resulting from an influence of the optical proximity effect, individual pattern widths 20A, 20B and 20C of these resist pattern portions are formed narrower than individual widths 19A, 19B and 19C of the light shielding film patterns 15A, 15B and 15C. However, the pattern width 13A of the light shielding film pattern portion 13 is corrected on the basis of the light intensity simulation result. Therefore, it is possible to form the pattern width 16B having the same width as the pattern width 20B. Thus, it is possible to solve the problem as described in FIG. 4B.
Next, a pattern 27 shown in FIG. 6A is an isolated light shielding film pattern formed on a photomask, a pattern 29A shown in FIG. 6B is a resist pattern whose end portion causes a shrinkage resulting from an influence of the optical proximity effect when exposing the isolated light shielding film pattern 27 formed on the photomask on a semiconductor wafer so as to form a resist pattern on a surface of the semiconductor wafer.
Pattern 29 shown by a dotted chain line in FIG. 6B is an assumed resist pattern that will be formed in the case where the resist pattern exposed on the semiconductor wafer and formed on the surface thereof causes no shrinkage.
Pattern 31 shown in FIG. 6C is a pattern that corrects the shrinkage to a direction extending a longitudinal pattern width 27A of the isolated light shielding film pattern portion 27 on the basis of the light intensity simulation result. Thus, when the pattern 31 is exposed onto the semiconductor wafer so as to form a resist pattern on the surface thereof, as shown in FIG. 6D, the resist pattern can be generated as a pattern 33 having the same length as the pattern 29 shown by the dotted chain line.
According to the conventional correcting methods as described above, in the case where there is a need for exposing a pattern width having a size near an exposure wavelength of light used in exposure on a semiconductor wafer, an edge of the pattern is divided. Then, a light shielding film pattern formed on the photomask is exposed on the semiconductor wafer for each divided edge of the pattern so as to generate a semiconductor transfer resist pattern. Subsequently, bias is applied to the resist pattern for each divided edge so that a pattern having a desired shape can be obtained, and thus, correction is made.
The following methods have been proposed as the method of applying bias. Specifically, there are a method of reading a pattern for each divided edge as a data, and computing the data so as to obtain correction data, and a method of obtaining the correction data by mutually connecting moved edges after being moved for edge unit.
However, according to the aforesaid conventional methods, the operation as described above is successively carried out with respect to all patterns per semiconductor wafer formed on the photomask, and then, correction data is generated. For this reason, a processing time for the operation is much spent, and a large amount of memory is required for storing a pattern data generated by the operation. As a result, there is a problem that the operation must be carried out while transferring the memory contents to other high capacity memory, and therefore, a much of time is required. Moreover, it is difficult to obtain a correction data by carrying out the operation in a TAT having a range allowable in practical use.
In order to solve the above problems, the present invention provides a correcting method of an exposure pattern comprising the following steps of: generating a serif pattern relative to a layout-designed exposure pattern; correcting the layout-designed exposure pattern by graphically computing the layout-designed exposure pattern and the serif pattern; and correcting an optical proximity effect in exposure by the layout-designed exposure pattern. Therefore, it is possible to rapidly perform operational processing for correcting the optical proximity effect.
Further, the present invention provides an exposure method using an exposure pattern, comprising the following steps of: generating a serif pattern relative to a layout-designed exposure pattern; correcting the layout-designed exposure pattern by graphically computing the layout-designed exposure pattern and the serif pattern; and using an exposure pattern correcting an optical proximity effect in exposure by the layout-designed exposure pattern. Therefore, it is possible to rapidly perform operational processing for correcting the optical proximity effect of the exposure pattern.
Further, the present invention provides an exposure system using an exposure pattern, which generates a serif pattern relative to a layout-designed exposure pattern, and corrects the layout-designed exposure pattern by graphically computing the layout-designed exposure pattern and the serif pattern, and further, uses an exposure pattern correcting an optical proximity effect in exposure by the layout-designed exposure pattern. Therefore, it is possible to rapidly perform operational processing for correcting the optical proximity effect of the exposure pattern of the exposure system.
Further, the present invention provides a photomask including an exposure pattern, which generates a serif pattern relative to a layout-designed exposure pattern, and corrects the layout-designed exposure pattern by graphically computing the layout-designed exposure pattern and the serif pattern, and further, corrects an optical proximity effect in exposure by the layout-designed exposure pattern. Therefore, it is possible to realize a photomask that is capable of rapidly performing operational processing for correcting the optical proximity effect of the exposure pattern.
Further, the present invention provides a semiconductor device manufactured in the following manner of: generating a serif pattern relative to a layout-designed exposure pattern; correcting the layout-designed exposure pattern by graphically computing the layout-designed exposure pattern and the serif pattern; and using an exposure pattern correcting an optical proximity effect in exposure by the layout-designed exposure pattern. Therefore, it is possible to provide a semiconductor device using a correction exposure pattern that is capable of rapidly performing operational processing for correcting the optical proximity effect of the exposure pattern.